Programmable clock generator lowers jitter, saves power

The Si5350/51 clock generators use Silicon Labs' MultiSynth technology to synthesise a different frequency on each of the eight outputs. By integrating clock synthesis in the output divider stage, the parts provide the clock synthesis capability of eight PLLs while reducing board space and power consumption. James Wilson, timing products marketing manager, said the company had previously focused on timing devices for high speed comms systems. "But we have expanded this focus to address applications which are more high volume and cost sensitive." Wilson added this expansion had been designed to avoid 'me too' products. "We've taken lessons learned from developing high performance products to create an architecture that targets the consumer, enterprise and communications markets." The Si5350/51 generates system clocks with frequencies of up to 133MHz with zero frequency error. The parts can also generate clocks from a crystal input as well as clocks synchronised to a reference clock or analogue control voltage input. Custom pin controlled versions of the Si5350 can be created using Silicon Labs' ClockBuilder. "Typically," Wilson noted, "customisation is done at the wafer level and samples take six to eight weeks. We can supply samples within two weeks. A lot of applications have rapid development cycles and designers are always under pressure to get their timing solutions done."