CrossLink is said to combine the flexibility and time to market benefits of an FPGA with the power and functional optimisation of an ASSP. As such, Lattice claims, the device creates a new product category – the programmable ASSP.
Michael Buckley, UK and Ireland sales manager, noted: “CrossLink is intended to solve incompatible chip to chip communications; for example, an image sensor with one type of output connecting to a processor which needs a different input or which doesn’t have enough I/O. It’s the only completely customisable video bridge and is suitable for any applications where there are sensors, displays and processors that need to communicate.”
Said to offer the fastest MIPI D-PHY bridging currently available, the part supports 4K image data transfer at up to 12Gbit/s. It integrates 5936 LUTs, 180kbyte of block RAM, 47kbyte of distributed RAM and two hard D-PHY blocks. Configuration of the device is supported by IP and reference designs which can be downloaded from the Lattice website.
Four package options are available: 36 WLCSP, measuring 2.5 x 2.5mm; 64ucfBGA, measuring 3.5 x 3.5mm; 81csfBGA, measuring 4.5 x 4.5mm; and an 80ctfBGA measuring 6.5 x 6.5mm. The devices provide 17, 29, 37 and 36 I/O respectively.
