Samsung starts 3d NAND production, claims 24 layers possible

V-NAND uses Samsung's proprietary vertical cell structure based on 3D Charge Trap Flash (CTF) technology and a vertical interconnect to link the 3d cell array. The company says this provides more than twice the scaling of 20nm class planar NAND flash. "3D V-NAND flash technology is the result of years of efforts to push beyond conventional ways of thinking and pursue much more innovative approaches in overcoming limitations in the design of memory semiconductor technology," said Jeong-Hyuk Choi, Samsung's senior vice president, flash product and technology. Samsung has revamped its CTF architecture, first developed in 2006. By going to three dimensions, it says reliability and speed have 'improved sharply', claiming at least a doubling of reliability as well as twice the write performance of a conventional 10nm class floating gate NAND flash memory. Using a special etching technology, Samsung says up to 24 layers can be stacked. This means that memory capacity can be increased by going upwards, rather than relying on a linear shrink.