The programme is committed to establishing an ecosystem for the design and fabrication of next generation System-on-Chip (SoCs) manufactured on IFS’ leading-edge process technologies.The initiative promotes collaboration between IFS and its ecosystem partners, and is focussed on reducing risk and tackling design barriers while accelerating time-to-market for mutual customers’ products. IFS Accelerator - EDA Alliance partners receive early access to Intel process and packaging technologies, allowing them to co-optimise and enhance tools and flows by using Intel’s technology capabilities.
Commenting Rahul Goyal, vice president and general manager for Intel Product & Design Ecosystem Enablement said, “The combination of Siemens’ world-class EDA offerings and IFS' leading-edge process technologies will provide design teams across the industry with the solutions needed to deliver in today's competitive IC markets.”As part of the alliance, Siemens plans to collaborate closely with IFS to optimise best-in-class IC design tools, flows and methodologies for Intel’s processes. The initial Siemens EDA product lines certified by IFS include the Calibre nm platform, as well as the Analog FastSPICE (AFS) platform for circuit verification targeting nanometer analogue, radio frequency (RF), mixed-signal, memory and custom digital circuits.
“With the increasing importance of semiconductors in the global economy, Intel’s commitment to the foundry market through IFS is an important new source of innovative capacity for advanced products,” said Joe Sawicki, executive vice president, IC-EDA for Siemens Digital Industries Software. “Siemens looks forward to collaborating with IFS to help provide software solutions that are tuned to allow mutual customers to get the most out of Intel process and packaging technologies.”
