Sony unveils next gen cmos image sensor

The image sensor layers the pixel section containing formations of back illuminated structure pixels onto chips containing the circuit section for signal processing, which is in place of supporting substrates for conventional back illuminated cmos image sensors. According to Sony, the stacked cmos image sensor features built in large scale signal processing circuits required for higher image quality and better functionality; a more compact image sensor chip size; higher image quality of the pixel section; and faster speeds and lower power consumption. Conventional cmos image sensors mount the pixel section and analogue logic circuit on top of the same chip, which require numerous constraints when wishing to mount large scale circuits. Sony has established a structure that layers the pixel section containing formations of back illuminated structure pixels over the chip affixed with mounted circuits for signal processing. This is in place of supporting substrates used for conventional back illuminated cmos image sensors. With this stacked structure, large scale circuits can now be mounted keeping chip size small. As the pixel section and circuit section are formed as independent chips, a manufacturing process can be adopted, enabling the pixel section to be specialised for higher image quality while the circuit section can be specialised for higher functionality. Sony claims this simultaneously achieves higher image quality, superior functionality and a more compact size. In addition, faster signal processing and lower power consumption can also be achieved through the use of the process. Samples will be shipped from March 2012.