EMULATION: Veloce OS3 extends emulation resources

This breakthrough verification environment begins with the Mentor Graphics Veloce emulator, the best-in-class and highest capacity Veloce emulation platform on the market. Veloce enables complete functional verification of today's complex SoC designs. Its custom emulation-on-chip technology delivers highly-reliable compiles, simulation-like interactive debug, superior throughput, and fast turnarounds. Veloce provides unlimited throughput, increasing communication bandwidth by allowing multiple, physical, co-model links for design verification environments that require larger communication bandwidths between the testbench and the design. Furthermore, using the TestBench Xpress technology, Veloce accelerates an existing simulation environment by many thousands of times the speed of software simulators. Veloce OS3 enhances the efficacy of the VirtuaLAB environment, enabling hundreds of global users to simultaneously run verification remotely on the same machine. The Veloce OS3 VirtuaLAB peripherals are reconfigured instantly to support multiple projects and rapidly shifting priorities. This is possible because VirtuaLAB is hosted on standard datacenter computers, not proprietary hardware targets. This turns a Veloce OS3 emulator into a globally-accessible, around-the-clock resource for the entire company. Veloce OS3 introduces global emulation resource management technology that supports project teams around the world, maximising productivity and total verification return on investment. The Enterprise Server determines the most efficient location to run each job and serves high-priority jobs by temporarily suspending jobs of lower priority. Veloce OS3 also delivers advanced verification features, including PSL/ SystemVerilog assertions, functional coverage, and UPF for low power. This enables high-performance coverage closure flow and pre-silicon performance analysis of critical SoC subsystems running application software. Veloce OS3 is also the best platform for pre-and-post-silicon debug. The Veloce OS3 simulation-like debug environment eliminates the learning curve for new emulation users. It provides visibility of all nodes at all times. Veloce has a scalable capacity from 16 million to 2 billion gates, enabling it to handle a wide range of design sizes and the most advanced verification tasks and methodologies. Additionally, Veloce features advanced methodology-based verification, IP and system-level verification in a targeted application environment, software and firmware verification, power analysis and power island verification, assertion-based verification and coverage collection. Truly, the time has come for semiconductor companies to embrace the expanded utility and higher ROI of emulation. Company and services info Mentor Graphics is a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic and mechanical products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. Mentor Graphics has the broadest industry portfolio of best-in-class products and is the only EDA company with an embedded software solution. Services Design-Through-Manufacturing PCB Systems Development Mechanical Analysis Functional Verification Design to Silicon New and Emerging Products Electrical System and Harness Engineering Electronic System Level (ESL) Design Embedded Systems Design Mentor Graphics (UK) Ltd Rivergate Newbury Business Park London Road Berkshire RG14 2QB tel: +44 (0)1635 811411