Engineering publications brought to you by Mark Allen

Risc v

Deep Vision licenses SiFive Intelligence X280 processor

Lattice expands Automate solution stack

Imagination launches RISC-V CPU family

SoC design for AI-based applications using RISC-V Vector processors

Imperas releases RISC-V verification product

HPMicro releases HPM6000 series of microcontrollers

IAR Systems and Codasip collaborate on low-power RISC-V-based applications

MIPS selects Imperas Reference Models for RISC-V processor verification

Imperas announces RISC-V product updates

sureCore designs multi-port memory for Semidynamics AI chip

Codasip expands ecosystem with XtremeEDA

Codasip boosts Studio processor design tools