Engineering publications brought to you by Mark Allen

EDA & Design Software

Cadence and Google Cloud look to advance EDA ecosystem

US Government to fund SkyWater's 90 nm Rad-Hard platform IP ecosystem

Cadence Certus now delivers up to 10X faster concurrent full-chip optimisation and signoff

GBT files patent for automatic generation of integrated circuits layout blocks

SEGGER and Cadence add native J-Link support for Tensilica cores

Model factories

Samsung Foundry certifies Cadence Voltus-XFi custom power integrity solution

Synopsys and Samsung Foundry collaborate to enable 3nm process technology

SFN looks to end monopoly of Taiwanese and Korean chip producers

Renesas introduces automotive Integrated Software Development Environment

Siemens automates 2.5D and 3D IC design-for-test for next generation ICs

Synopsys unveils unified emulation and prototyping system