Push me, pull you
SoC and standard products are creating conflicting requirements for analogue processes. By Paul Dempsey.
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For some time, 0.18µm cmos has been considered the ‘sweet spot’ for the implementation of a/d conversion. The node offers high performance transistors, the mosfets meet the requirements of high resolution applications and a 1.8V power supply has allowed designers to reuse architectures and other techniques that boast a couple of decades of maturity.
However, at next month’s International Solid State Circuits Conference (ISSCC) in San Francisco (12 to 15 February -- for more, download isscc.doc using the link on the right), more than half the papers on a/d converters are for implementations at 90nm and smaller. So, is the analogue world gearing up for a major node shift?