But it has proven to be a reliable candidate for a class of transistor that may span both ends of the semiconductor spectrum: the very cheap and the very dense.
Indium is already the mainstay of the display industry. Thanks to the oxide of its alloy with tin being almost transparent, it remains the first choice for making conductors carrying electrical signals to liquid-crystal elements. This optical transparency is not as essential to the many of the new applications. But the ultra-rare element has a bunch of properties that continue to make it the popular choice in oxide-based electronics.
Close to two decades ago, as governments such as the UK’s invested in printed and flexible electronics, much of the emphasis was on carbon-based polymers sprayed or screen-printed onto a carrier film. Such additive processes promised roll-to-roll fabrication at high speed. However, oxides of element such as zinc showed better properties. Toppan Printing demonstrated in the mid-2000s a flexible display backplane made using an oxide of indium, gallium and zinc (IGZO) that could run at higher frequencies than carbon-based devices.
Though bringing them into purely additive printing-based processes has proven difficult, fabs using conventional equipment can produce oxide-based devices at much lower temperatures that those needed for silicon transistors. Silicon in transistors needs to be crystalline and with as few defects as possible. Removing the defects from the crystals calls for high annealing temperatures. Oxide-based devices can still operate at reasonably efficient semiconductors in an amorphous structure and are far more tolerant to variations in the layers of material.
IGZO remains the mainstay of R&D into oxide-based devices with the main volume application today lying in supporting another product of the printed-electronics movement: the organic light-emitting diode (OLED). Several of the major display vendors favour IGZO for its reasonably high carrier mobility compared to organic semiconductors. In recent years, however, IGZO and similar oxide have seen a resurgence of interest among researchers for other applications. The VLSI Symposium in Honolulu this month shows that effect clearly. “One trend that we have seen here is the prevalence of oxide semiconductors. Close to 25 to 30% of the technology-conference papers are in that space. That’s a huge increase compared to what we've had in the past,” says Vijay Narayanan, programme chair for the technology stream at VLSI Symposium. “It’s becoming pretty clear that functionality in the back-end of the line has become very important.”
Academic focus
Much of the work is coming from academia rather than industry, where the focus is on delivering power and I/O from the backside of the wafer and on replacements for finFETs. But the oxide-focused papers have a similar aim: improve density by pushing elements into the metal interconnect made using low-temperature back-end of line (BEOL) processes. The applications range from DC/DC converters and gating to manage power very close to the point of delivery to 3D memories that use TFTs that sit directly over logic circuits. “All of these have come together in the form of oxide semiconductors that have shown a lot of benefits in the TFT regime. I feel it's a combination of these application spaces having a need and then the oxide semiconductor reaching a certain level of maturity,” Narayanan adds.
One example at the presented at the conference is work by Purdue University and Samsung that uses indium oxide not just for the channel material but for its control gate as well. The device structures can act as both logic and memory devices, similar to ferroelectric silicon transistors that incorporate hafnium oxide in their gate stack. One issue that holds oxide-based devices back from being used in high-integration logic circuits is the lack of a suitable material for p-channel transistors that are essential for competing with mainstream silicon CMOS circuits.
“It is still largely an nFET-dominated space,” Narayanan says. Though there have been some proposals to make pFETs using oxides, such as alloys of tin, none are ready to go into production. That has limited applications of oxide semiconductors in their original space: logic devices that sit on thin, flexible electronics rather than rigid silicon substrates.
Having built a 300mm fab south of Durham to cater for higher production volumes, Pragmatic Semiconductor hopes to have a production-ready candidate for a pFET and a CMOS process that uses it sometime next year.
“We do have a settled candidate for p-type,” said Shane Geary, Pragmatic’s senior vice president of manufacturing and operations, at the official opening of the first phase of the fab in late March. “The toolset we have at the fab caters for the next generation, which will also include one-time-programmable memory as well as full CMOS. The process will probably need two or three additional tools. But it will be an evolution of the current process.”
In its circuit-development work with Imec, Pragmatic has used a pseudo-CMOS cell library based on nFET devices to help improve the power efficiency of I/O cells at the cost of some density. But for the company’s current plans, which revolve around ultralow-cost RFID tags, the logic element is relatively simple. The company aims to use its move 300mm production to improve its economies of scale. One advantage of using a polymer substrate rather than a silicon wafer for the oxide transistors is that it is significantly easier to dice into individual chips and they can have a much higher aspect ratio than typical silicon RFID controllers. According to Simon Kirk, senior RF product manager, this shape can overlap all the rings of a printed antenna. A square silicon device needs a landing area with contacts. Anisotropic conductive polymer (ACP) adhesive is all that the device needs to make electrical contact with the antennas. Conduction through these compounds is only in the vertical direction.
“Three drops of ACP and you’re done. That kind of efficiency makes a big difference to the supply chain,” Kirk notes.
The company sees is lower energy and cost combined with shorter turnaround times as potentially important in highly cost-sensitive markets like RFID and anti-counterfeit labelling. “Fundamentally, the number of process steps to manufacture a wafer is one sixth to one eighth of a comparable silicon process at the same geometry,” Geary notes. “We have a very efficient automated fab with very little wait time. We are running with very little weight to make very cheap ICs that are flexible, very thin and made on a very short cycle time. The time from wafers in to wafers out is a matter of weeks.”
That cycle time compares to two or three months for even mature silicon processes. Geary reckons the addition of CMOS compatibility will increase the number of process steps by just another 20%.
The break with silicon has led to some other differences to silicon in terms of fab design. Pragmatic has pursued a modular approach with a small ballroom chamber for operators to work in rather than the corridor-based design used by most silicon plants that work with 300mm silicon wafers. The company plans to add more of these “fab in a box” modules alongside to grow its production capacity.
However, despite the break with mainstream silicon, the use of oxide semiconductors means that there is a lot of cross-pollination that could happen from other application areas and avoid the need to lay a completely new trail. And that alternative to indium may appear one day.
