Growth is being driven by a combination of trends from the rising demand for AI in the cloud and the rapid growth of the Internet of Things, to autonomous driving, mobile phones and the accelerating roll-out of 5G. But while there remain challenges associated with competing directly with ASICs, the very latest FPGA technologies are not only offering increased speed and density but are doing so at much lower levels of power consumption.
It’s an interesting market and a fast moving one too to be operating in and at Xilinx’s latest annual Developer Forum (XDF), held in San Jose, California, last month the breadth and depth of how its technology is being used and deployed was on display for those attending the event.
The Forum brought together customers, partners, developers, and company employees and, in his opening address, the company’s CEO, Victor Peng, highlighted how Xilinx’s platforms are playing an increasingly varied and important role with the likes of Samsung, AWS, Microsoft, Hitachi, and start-ups such as Pony.ai., a developer of autonomous systems.
During the course of his presentation senior figures from these companies came on stage to discuss their business and technology collaborations with Xilinx.
Gadi Hutt, senior director of business development and product at Amazon/Annapurna Labs, and Vin Sharma, head of engineering for Amazon Sagemaker Neo and AWS AI, highlighted the advantages of Xilinx’s technology in terms of its scalability and efficiency.
AWS is the world’s largest provider of cloud storage and compute solutions and, as a result of its growing geographical reach, is making it easier for FPGA app developers to launch their products globally at scale.
“Some of the world’s most notable companies are taking advantage of F1 to power compute-intensive applications,” Gadi explained and he mentioned enterprise network security provider Trend Micro.
“They have just launched a high- performance version of its network security virtual appliance on the AWS marketplace running on an FPGA, enabling AWS customers to expand their on-premises network monitoring and security to the AWS cloud.”
AstraZeneca is using F1 to accelerate its research, having built an efficient genomic sequence data processing pipeline that can process more than 100,000 genomes in 100 hours and is expected to run even faster with new pipeline optimisations.
As 5G services rapidly take shape, Xilinx has been working closely with Samsung in driving its adoption with its next-generation wireless solutions.
Wonil Roh, VP of product strategy, Samsung Networks, said that their work together was centred on the company’s Massive Multiple-input, Multiple-output (mMIMO) and millimeter wave (mmWave) solutions for 5G, which use the Xilinx UltraScale+ platform.
The pace of development is accelerating and earlier this year Xilinx announced that, in collaboration with Samsung, it was involved with the first 5G New Radio (NR) commercial deployment in South Korea. Successful 5G installations have also started in the U.S. with both mobile commercial and fixed service commercial deployments.
According to Roh, the advantages of using programmable devices from Xilinx included minimal power consumption, significant memory size and low thermal output that, when combined, were enabling Samsung to develop 5G products which were not only light with a compact form-factor but were low power making them, “ideal for easy deployments.”
When it comes to autonomous driving James Peng, CEO of Pony.ai explained how Xilinx FPGAs and Versal ACAP are being used to power its Level 4 autonomous driving systems, PonyPilot.
From perception to HD mapping to data management, PonyPilot is using FPGAs - and soon Xilinx Versal devices - to significantly increase the accuracy of its sensor-fusion system in real-world driving conditions while at the same time meeting strict requirements for functional safety and validation.
Using Xilinx technology, the Pony.ai team said that they had been able to achieve zero discrepancy in sensor-fusion output for real-time reactions on the road, which was described as a ‘marked improvement’ from previous efforts.
Vitis unveiled
While the opening sessions of the Forum focused on how Xilinx’s technology is helping to address some of the key technology trends in this space, the biggest announcement at this year’s event was the launch of Vitis, a unified software platform that, according to Peng, will “help to transform technology innovation.”
A big claim, but the Vitis platform has been designed to enable a broad range of developers - including software engineers and AI scientists - to take advantage of the adaptability that is traditionally associated with programmable technology but do so in a highly efficient way.
Vitis can automatically tailor the Xilinx hardware architecture to the software or algorithmic code without the need for hardware expertise and rather than imposing a proprietary development environment, it is able to plug into common software developer tools and use a set of optimised open source libraries leaving, as Peng said, “developers to focus on their algorithms.”
“With exponentially increasing compute needs, engineers and scientists are often limited by the fixed nature of silicon they use,” explained Peng. “As a singular environment Vitis will mean that both programmers and engineers from all disciplines will be able to co-develop and optimise their hardware and software, but they will be able to do that by using the tools and frameworks they already know and understand.
“This means that they can adapt their hardware architecture to their application without the need for new silicon.” Peng continued, “We want the platform to empower software developers and offer them the efficiency of application-specific hardware without [the cost of] new silicon.”
The base layer is the target platform, which includes a board and pre-programmed I/O. The second layer, called the Vitis core development kit, encompasses the open-source Xilinx runtime library to manage the data movement between different domains, including the subsystems, the AI Engine in the forthcoming Versal ACAP, as well as, if required, an external host.
This layer also includes the core development tools such as compilers, analysers and debuggers which can be easily integrated with industry-standard build systems and development environments.
In the third layer are more than 400 optimised and open-source applications across eight Vitis libraries. These include the Basic Linear Algebra Subprograms (BLAS) library, the Solver library, the Security library, the Vision library, the Data Compression library, the Quantitative Finance library, the Database library and the AI library.
These libraries mean that software developers will be able to call pre-accelerated functions using a standard application programming interface (API).
The fourth and described by Peng, “as the most important element of the platform” is Vitis AI, which integrates a domain-specific architecture (DSA) that configures Xilinx hardware to be optimised and programmed using industry-leading frameworks like TensorFlow and Caffe.
Vitis AI provides these tools to optimise, compress and compile trained AI models running on a Xilinx device in about one minute. It also delivers specialised APIs for deployment from edge to cloud, all with best-in-class inference performance and efficiency.
“Vitis is a major milestone for our platform transformation,” said Peng. “It’s been five years in the making and involved 800 software engineers. It‘s simple to deploy and use and will enable developers to focus on their algorithms and not the hardware underneath.”
Xilinx has also announced the launch of a developer site that provides access to examples, tutorials and documentation, as well as a space to connect the Vitis developer community and will be managed by Xilinx and Vitis experts and enthusiasts. The aim being to provide information on the latest Vitis updates, as well as tips and tricks.
According to Xilinx, Vitis will enable developers to unlock new features and keep pace with growing demands from customers in what is a rapidly changing market.
