Audio ip core enhanced for 40% lower power
1 min read
Audio SoC design specialist, Tensilica, has announced it has enhanced an audio ip core, for 40% lower power and up to 50% size reduction.
The HiFi EP audio dsp engine is based on the company's earlier HiFi 2 Audio dsp architecture, optimised for simultaneous multichannel codec support and expanding audio pre/post production in products such as Blu-ray Disc players, digital tv and smartphones. It has also been enhanced for high quality voice pre/post processing. According to Tensilica, these enhancements result in up to 40% lower power and up to a 50% size reduction.
The device incorporates a 32x24 multiply accumulator designed to provide higher performance at lower power on a DTS Master Audio Lossless decoder used in Blu-ray Disc devices. DTS Master Audio decoding on the HiFi EP dsp requires 115MHz of processing power.
Tensilica says it has also enhanced the cache memory subsystem with a predictive prefetch unit designed to improve performance in high memory latency SoC designs.
Steve Roddy, Tensilica's vice president of marketing and business development, said: "With this third generation of HiFi audio products, we offer chip designers a choice of two software compatible products. For most products, our standard HiFi 2 audio dsp provides higher performance than most competing solutions. However, for high quality voice in mobile applications and for high end home entertainment products, our new HiFi EP dsp is the right choice."
