DSP IP core provides ‘world’s highest’ performance for LTE Advanced
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Tensilica's has announced its next generation architecture for dsp IP cores for SoC design. Providing over 100GigaMACs performance in 28nm high performance process technology, Tensilica claims it can 'easily outperform' all other dsp IP cores on the market. The ConnX BBE64-128 has been designed to meet the performance requirements for LTE Advanced, which requires at least five times more processing power than LTE.
The company has also unveiled the ConnX BBE64-UE, which is optimised for the low power and small area requirements of LTE Advanced handsets. Both devices are based on the new ConnX BBE64 architecture, which can optimise a dsp core for particular requirements. The product line also includes dsps for LTE, including the ConnX BBE16 LTE dsp and the new ConnX SSP16, ConnX BSP3, and ConnX Turbo16, also introduced today.
According to Tensilica, the new ConnX BBE64-128 dsp can perform at 128MACs per cycle for maximum throughput and minimum energy for most common mimo and channel estimation functions, used extensively in LTE Advanced software. It is based on a multislot very long instruction word (vliw) architecture, designed to provide sustained performance across a number of applications with dense code and power efficiency. For non vector algorithms, high code density can be achieved with modeless switching to Tensilica's smaller standard 16 and 24bit instructions.
"We leveraged our Tensilica dataplane processing unit (dpu) technology to create a more compact ConnX BBE64-128 dsp by providing the extra MACs just for those functions required by LTE Advanced when needed," said Chris Rowen, pictured, Tensilica's cto. "We believe this gives our customers the best performance, price and area efficiency."
Evaluation kits for the cores are expected to be available for early access customers in the autumn of 2011.
