The collaboration integrates Semidynamics’ family of 64-bit RISC-V processor IP cores, with exceptional memory bandwidth and configurability, with Baya Systems’ WeaveIP Network on Chip (NoC) system IP.
WeaveIP has been engineered for ultra-efficient, high-bandwidth, and low-latency data transport. Complementing this is Baya Systems’ software-driven WeaverPro platform, which enables rapid system-level optimisation, ensuring that key performance indicators (KPIs) are met based on real-world workloads while providing the design flexibility for future advancements.
New computational platforms are needed to address the challenges of advanced AI and machine learning in key market segments and to keep pace with advances in technology, these platforms need to balance processing power with efficient data movement. As AI, ML and HPC workloads grow exponentially and systems shift to larger scales and chiplets, the focus is now shifting from raw compute power to efficient data transfer between processors and chiplets.
“Our customers need high-performance compute that doesn’t get bottlenecked by inefficient data transport,” said Roger Espasa, CEO of Semidynamics. “Partnering to pre-integrate with Baya Systems’ WeaveIP technology will help to accelerate development timelines for our mutual customers, eliminating this bottleneck and enabling a new level of performance for AI and HPC applications.”
Baya Systems has emerged as a key player in semiconductor innovation and its NoC solutions are chiplet-ready and engineered for extreme scalability - complementing Semidynamics' flexible, high-bandwidth architectures.
“Our mission is to support our customers’ processor IP choices while providing the SoC connectivity backbone for the expanding RISC-V ecosystem,” explained Dr. Sailesh Kumar, CEO of Baya Systems. “Together with Semidynamics, we’re enabling SoC designers to push the boundaries of performance, efficiency and scalability in AI and HPC applications.”
