The Cadence VIP offerings are intended to empower users, enabling them to confidently develop their next-generation industrial, automotive, hyperscale data centre and mobile SoCs while keeping pace with the latest industry standards, including LPDDR5x, MIPI CSI-2 4.0 and UFS 4.0, and the newest versions of the USB4, Arm AMBA 5 CHI and GDDR interfaces.
Cadence VIP offer customers a comprehensive verification solution for complex protocols and customers will have access to a consistent API across all VIP with complete bus function models (BFMs), integrated protocol checks and coverage models, facilitating rapid adoption. The VIP support multiple application areas and specifications, including:
Industrial:
- MIPI I3Csm 1.1
- MIPI CSI-2 4.0
- eUSB2 1.2
Automotive:
- MIPI A-PHYsm 1.0
- MIPI DSI-2sm 2.0
- Flash ONFI 5.0
- CAN XL
Hyperscale data centre:
- CCIX 2.0
- Latest version of AMBA CHI
- Latest version of GDDR
Consumer and mobile:
- DisplayPort 2.1
- Ethernet 5G
- LPDDR5x
- Latest version of USB4
- UFS 4.0
All Cadence VIP solutions include Cadence TripleCheck technology, which provides users with a specification-compliant verification plan linked to comprehensive coverage models and a test suite to ensure compliance with the interface specification. The new VIP also support the expanded Cadence System-Level Verification IP (System VIP), which provides SoC-level test libraries, performance analysis, and data and cache coherency checkers.
“As requirements evolve and demand increases for higher bandwidth, lower power and more effective cache coherency management, new protocols arrive to address these issues,” said Paul Cunningham, senior vice president and general manager of the System & Verification Group at Cadence. “By introducing these 15 new VIP, Cadence provides customers with solutions that ensure they can keep up with evolving standards.”
