The Xtensa LX8 processor offers significant new capabilities to address the increasing system-level performance and AI requirements of processor-based SoC designs while still providing customers energy-optimised Tensilica IP solutions.
These robust enhancements have been driven by the continued push for pervasive intelligence at the edge in the automotive, consumer and deeply embedded computing markets. The Xtensa LX8 platform serves as the foundation for processor and system-level design innovations, including new DSP, multi-processor, interconnect and system-level IP products.
Scaling processor performance to meet the performance demands of intelligent edge devices for mobile and automotive applications requires designers to look holistically at the system-level requirements, according to Cadance and it is not enough to simply scale clock frequency or add additional processors, and factors such as data movement, memory bandwidth, latency and ease of integration all become more critical as SoC designs grow more complex. For example, recurrent and convolutional neural networks often include large datasets that must be quickly accessed from system memory in order to meet real-time requirements.
Consequently, processor and DSP subsystems must now support multiple concurrent algorithms and ever-larger width filters, so the ability to reduce the latency of memory accesses and limit DMA transfers of repetitive zeroes can greatly improve overall system performance. These requirements, along with the continued emphasis on energy-efficient computing and AI, drove the development of the Xtensa LX8 platform, which includes several features designed to optimize overall system performance per watt.
Xtensa platform enhancements will be leveraged across the broad family of Tensilica HiFi Vision, ConnX and FloatingPoint DSPs and AI controllers and include:
L2 cache: Offers performance improvements of 50% or more for cache-based subsystems compared to the Xtensa LX7 processor while reducing pressure on L1 caches
Improved branch prediction: Achieves significant speedup in increasingly critical control-code performance
Enhanced Arm AMBA interfaces: Benefits include both original AMBA 4 AXI interconnect for easy integration into today’s high-performance devices and low-latency APB interface, further improving system performance while reducing pressure on the primary system bus
Enhanced iDMA: Improves 3D DMA transfers found in complex DSP algorithms while also adding compression/decompression support and expanding the physically addressable memory to 40 bits
Expanded interrupt support: Accommodates up to 128 interrupts to service the most demanding system-level requirements
“Today’s advanced SoC designs demand even greater processor subsystem performance. Processors based on the Xtensa LX platform are widely used today in the most demanding audio/voice, automotive ADAS and embedded computing applications, so we have extensive first-hand knowledge of our customers’ challenges in the drive for ever-increasing system-level performance,” said David Glasco, vice president of research and development for Tensilica IP at Cadence. “Key capabilities in the latest generation of our industry-leading extensible processor platform enable our customers to create even more advanced domain-specific processors.”
