Chipmakers join forces to design robust chips

The Eureka Medea+ Microelectronics Cluster Robin project was organised by Infineon, NXP Semiconductors and STMicroelectronics to define and deal with the problems of performance levels for high speed silicon chips. The project was designed to focus on improving design methods and tackling problems earlier in the design phase to enhance integrated circuit design approaches. The three manufacturers were joined by a laboratory with expertise in quantum physics and four EDA companies. Robin was formed with an objective to optimise the design approach to both existing 130 and 90nm and future 65 and 54nm technologies by defining the most efficient yield and reliability trade offs between circuit robustness. The partners also said that they wanted to address the most efficient use of technology affecting performance, density and power consumption, enhancing existing performance levels and problems such as signal corruption in power distribution. Philippe Garcin of STMicroelectronics, explained: ""We took a bottom up approach, from technology to chip level and then to SIP level. We examined a wide range of issues, from power and substrate effects through signal interference to manufacturing cost. Coming together within the MEDEA+ framework made an important difference. At the end of the project, among its 50 outcomes, about 80% were available for exploitation: the same results would not have been possible – either in terms of quantity or in terms of quantity – if the partners had worked alone. "By aligning their requests, the industrial partners were able to prepare concerted specifications for their EDA tool providers. Thanks to the standards based approach used in Robin, it is technically possible to share the results of the project across European industry – and the consortium is already taking the developments further in a new research project."