Codasip Labs, launched recently by Codasip, is set to play a central role in identifying opportunities where SecuRISC5 should focus its attention and will also act as the hub, coordinating pan-industry collaboration.
Following the recent acquisition of Cerberus Security Labs, Codasip is accelerating security developments for its RISC-V processor IP and plans to make security reference designs available in 2023. Because a truly secure system cannot be developed in isolation, Codasip is working with partners to deliver a complete and secure RISC-V ecosystem.
Commenting Jamie Broome, Vice President of Automotive and Products, Codasip, said,“Security is the ‘feature’ that people often fail to see the value in, but everyone knows they need. Another important aspect is that without security, there is no safety, and we are therefore adopting a holistic approach. We will help our customers integrate RISC-V safety and security by providing more than secure cores."
“It’s great to see Codasip take the initiative to boost security of RISC-V devices; if security is not tackled properly, it’s a potential threat to the wider adoption of RISC-V. We will be working closely with Codasip and other ecosystem partners to provide developers the opportunity to build and test out their secure concepts using Intel Pathfinder for RISC-V2 running in a trusted FPGA environment,” said Vijay Krishnan, General Manager, RISC-V Ventures at Intel.
RISC-V offers a platform to develop the widest range of systems for all types of secure applications and functions – particularly for domain-specific designs which struggle to get the custom solution or the necessary support from proprietary ISAs. RISC-V is increasingly being implemented in security systems and Codasip is active in the RISC-V standards processes.
The SecuRISC5 initiative will build on the work of the RISC-V International Working Groups and will implement new standards as they are ratified.
