The chipIgnite program expands upon the SKY130-based open source chip manufacturing program sponsored by Google and supports private commercial designs that include non-open source IP. This initiative is being seen as another step forward in the industry to broaden access to chip design by giving people the ability to more easily create and fabricate chips.
The chipIgnite program offers unique value to the designer which includes not only low-cost manufacturing, but also a development board and firmware stack to simplify design validation and test. All projects created as part of the chipIgnite program will utilize a full chip reference design template that implements the physical IO for the chip as well as provides a common management area to support test and evaluation of the user’s design.
The program also includes an optional automated open source design flow for implementing projects that enables users to generate layouts for their digital projects from RTL. The chipIgnite program will provide users a guaranteed reservation to ensure their project is included.
SkyWater’s open source 130nm CMOS platform will be used to fabricate chips for the chipIgnite program. The automotive-grade mixed-signal platform is well suited for IoT and edge computing as it is in a 'sweet spot' for enabling a combination of both digital and analogue circuit performance with embedded non-volatile memory for a wide range of SoC architectures. The program provides users 10 mm2 of total project area with fabrication for projects using the SkyWater Open Source PDK.
The chipIgnite program builds on an active community of 1500+ users for the Open PDK initiative where new designers can get support and access to resources through community messaging platforms such as Slack. In addition to using freely-available design flows based on open source EDA tools, designers can also employ proprietary design tools for creating their designs, allowing them to address design requirements not supported by open source tools.
The program is seen as being a good fit for users who want to create an initial prototype or proof-of-concept for an IP block or full SoC. The starting price of $9750 per project includes 100 QFN or 300 WCSP packaged parts and five evaluation boards. The chipIgnite shuttles also support users who are distributing initial boards or launching a pilot for their product. An option for 1000 WCSP parts at $20 each is available that enables the service to be used for early product builds.
The first manufacturing run in the chipIgnite program is optimised for university digital and mixed-signal chip design courses with a submission deadline for tape-out of June 18, 2021. The delivery of parts and assembled boards is planned for early October.
The first shuttle in the chipIgnite program will support fabrication of student projects as part of the EE272B course in the Electrical Engineering department at Stanford University for senior undergraduate and graduate students.
The new program also has industry support from organisations including QuickLogic and the CHIPS Alliance.
“CHIPS Alliance is a major champion of open source hardware design and associated design automation tools. I am excited to see the chipIgnite program offered by Efabless to include many different collaborative IP developers to prove new ideas. The platform alleviates the barriers to entry into chip design and allows for ready exploration of many concepts,” said Rob Mains, general manager of CHIPS Alliance.
