Its test chip was implemented using TSMC’s N3P process technology and CoWoS-R advanced packaging technology.
The HBM4 IP supports data rates of up to 12Gbps under all operating conditions and by leveraging a proprietary interposer layout, GUC has been able to optimise signal integrity (SI) and power integrity (PI) to achieve higher speeds for all types of CoWoS technology.
Comparing with HBM3, the HBM4 PHY delivers 2.5x bandwidth while improving 1.5x power efficiency and 2x area efficiency. In line with previous GUC HBM, GLink, and UCIe IPs, this HBM4 IP integrates proteanTecs’ interconnect monitoring solution to provide high visibility for testing and characterising the PHY while improving in-field performance and reliability for end products.
This announcement strengthens GUC’s extensive portfolio of advanced IPs, including its 32Gbps UCIe-A and GLink-3D IPs. Together, these offerings deliver a complete 2.5D and 3D total solution, helping customers to address demanding applications in AI and high-performance computing (HPC).
“We are proud to be the first company to have taped out a 12Gbps HBM4 controller and PHY IP,” said Sean Tai, President of GUC. “Our commitment to delivering best-in-class 2.5D/3D IPs and services remains strong. By integrating HBM4, UCIe-A, and GLink-3D IPs, we offer a comprehensive solution that meets the evolving needs of the semiconductor industry.”
GUC HBM4 IP highlights include:
- Signed off at 12Gbps in full range of corners and operating conditions
- High bus utilisation rate: ~90% at random read/write access
- Proprietary interposer layout to achieve best SI/PI for all types of CoWoS technology
- Embedded per-lane, in-mission mode I/O and Clock performance and health monitoring by proteanTec
