Intel demonstrates Knights Corner for first time
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Intel has demonstrated the first silicon of the 'Knights Corner' coprocessor at the International Conference for High Performance Computing, Networking, Storage and Analysis, Seattle.
The demonstration revealed that the architecture is capable of delivering more than 1TFLOPs of double precision floating point performance. This was the first demonstration of a single processing chip capable of achieving such a performance level.
Knights Corner is the first commercial Intel MIC architecture product and will be manufactured using Intel's latest 3D Tri-Gate 22nm transistor process. Featuring more than 50 cores, the Intel MIC products are designed to offer both high performance from an architecture specifically designed to process highly parallel workloads, and compatibility with existing x86 programming model and tools.
Rajeeb Hazra, general manager of Technical Computing, Intel Datacenter and Connected Systems Group, pictured, said: "Intel first demonstrated a Teraflop supercomputer utilising 9,680 Intel Pentium Pro Processors in 1997 as part of Sandia Lab's ASCI RED system. Having this performance now in a single chip based on Intel MIC architecture is a milestone that will once again be etched into high performance based computing (HPC) history."
Describing the device as 'unique', Hazra said that, unlike traditional accelerators, it is fully accessible and programmable like fully functional HPC compute node, visible to applications as though it was a computer that runs its own Linux based operating system independent of the host OS.
According to Intel, one of the benefits of Intel MIC architecture is the ability to run existing applications without the need to port the code to a new programming environment. This will allow scientists to use both cpu and coprocessor performance simultaneously with existing x86 based applications.