Intel’s Integrated Photonics Solutions (IPS) Group has demonstrated the industry’s most advanced and first-ever fully integrated optical compute interconnect (OCI) chiplet co-packaged with an Intel CPU and running live data. This OCI chiplet represents a leap forward in high-bandwidth interconnect by enabling co-packaged optical input/output (I/O) in emerging AI infrastructure for data centres and high-performance computing (HPC) applications.
“The ever-increasing movement of data from server to server is straining the capabilities of today’s data centre infrastructure, and current solutions are rapidly approaching the practical limits of electrical I/O performance. Intel’s achievement empowers customers to seamlessly integrate co-packaged silicon photonics interconnect solutions into next-generation compute systems. Our OCI chiplet boosts bandwidth, reduces power consumption and increases reach, enabling ML workload acceleration that promises to revolutionize high-performance AI infrastructure,” said Thomas Liljeberg, senior director, Product Management and Strategy, Integrated Photonics Solutions (IPS) Group.
This first OCI chiplet has been designed to support 64 channels of 32 gigabits per second (Gbps) data transmission in each direction on up to 100 meters of fibre optics and is expected to address AI infrastructure’s growing demands for higher bandwidth, lower power consumption and longer reach.
It enables future scalability of CPU/GPU cluster connectivity and innovative new compute architectures, including coherent memory expansion and resource disaggregation.
AI-based applications are increasingly deployed globally, and recent developments in large language models (LLM) and generative AI are accelerating that trend. Larger and more efficient machine learning (ML) models will play a key role in addressing the emerging requirements of AI acceleration workloads. There is a growing need to scale future computing platforms for AI which is driving exponential growth in I/O bandwidth and longer reach to support larger processing unit (CPU/GPU/IPU) clusters and architectures with more efficient resource utilization, such as xPU disaggregation and memory pooling.
Electrical I/O (i.e., copper trace connectivity) supports high bandwidth density and low power, but only offers short reaches of about one meter or less.
Pluggable optical transceiver modules used in data centre and early AI clusters can increase reach but at cost and power levels that are not sustainable with the scaling requirements of AI workloads.
A co-packaged xPU optical I/O solution can support higher bandwidths with improved power efficiency, low latency and longer reach.
The fully Integrated OCI chiplet leverages Intel’s silicon photonics technology and integrates a silicon photonics integrated circuit (PIC), which includes on-chip lasers and optical amplifiers, with an electrical IC. The OCI chiplet, which was demonstrated at this year’s Optical Fiber Communication Conference,was co-packaged with an Intel CPU but can also be integrated with next-generation CPUs, GPUs, IPUs and other system-on-chips (SoCs).
This first OCI implementation supports up to 4 terabits per second (Tbps) bidirectional data transfer, compatible with peripheral component interconnect express (PCIe) Gen5. The live optical link demonstration showcases a transmitter (Tx) and receiver (Rx) connection between two CPU platforms over a single-mode fibre (SMF) patch cord.
The CPUs generated and measured the optical Bit Error Rate (BER), and the demo showcased the Tx optical spectrum with 8 wavelengths at 200 gigahertz (GHz) spacing on a single fibre, along with a 32 Gbps Tx eye diagram illustrating strong signal quality.
The current chiplet supports 64 channels of 32 Gbps data in each direction up to 100 meters (though practical applications may be limited to tens of meters due to time-of-flight latency), utilising eight fibre pairs, each carrying eight dense wavelength division multiplexing (DWDM) wavelengths.
The co-packaged solution is also energy efficient, consuming only 5 pico-Joules (pJ) per bit compared to pluggable optical transceiver modules at about 15 pJ/bit. This level of hyper-efficiency is critical for data centres and high-performance computing environments and could help address AI’s unsustainable power requirements.
