OCTEON is Marvell's response to the increased demand for data centric compute and by combining compute with hardware accelerators, this DPU offers a significant TCO advantage and a number of new features.
According to Marvell it delivers three times the performance and 50 percent lower power compared to previous generations of OCTEON, an it is the first solution to be designed on a 5nm process to incorporate Arm Neoverse N2 cores. Among a number of other firsts claimed by Marvell are the first inline artificial intelligence/machine learning (AI/ML) hardware acceleration, the first integrated 1 terabit switch and the first solution to incorporate vector packet processing (VPP) hardware accelerators.
"To meet and exceed the growing data processing requirements for network, storage, and security workloads, Marvell focused on significant DPU innovations across compute, hardware accelerators, and high speed I/O," said John Sakamoto, vice president of Marvell's Infrastructure Processors Business Unit. "The OCTEON 10 brings compute leadership, supports networking and security workloads exceeding 400G, and incorporates leading edge I/O including DDR5 and PCIe 5.0."
Unlike other DPU solutions, which are limited to data centre use cases, the OCTEON 10 is scalable to service hyperscale cloud workloads, carrier and enterprise datacentres, 5G wireless transport, SD-WAN, and even fan-less networking edge boxes.
In order to deliver best-in-class power and performance across these applications, each OCTEON 10 device combines the optimal mix of compute, hardware acceleration, data path bandwidth, and industry-leading I/O including PCIe 5.0 and DDR5.
The OCTEON 10 family SDK is an open platform which leverages the Arm ecosystem. The SDK support includes networking, security, and storage stacks, comprehensive DPDK and VPP extensions, and support for virtualization and containers.
