The cooperation will enable joint customers to extend processors in systems on chip (SoC) after they have been manufactured. Codasip Studio allows an existing processor design to be extended by adding custom instructions and additional microarchitectural features. These new capabilities can be implemented on Menta’s co-extended eFPGA cores which have been optimised for implementing processor functions.
“By tightly coupling our eFPGA technology with the Codasip processor design automation technology, we are not only creating a new product, but we are revolutionising the way the processing will be performed,” said Menta Chief Executive Officer Vincent Markus. “By integrating eFPGA technology inside, we will fundamentally change the computing world.”
Currently, there is no hardware solution in the field allowing the adding of instruction sets into a processing solution. It has been demonstrated that adding custom instructions to a base instruction set can deliver significant performance improvements while not disproportionally increasing the silicon area.
Typical applications include cryptography, DSP and artificial intelligence.
In particular, the open RISC-V ISA is designed to be modular and to allow custom instructions. Codasip Studio enables designers to create custom instructions and can generate the necessary register-transfer level (RTL) by implementing the custom instructions in the data-path.
The joint Codasip-Menta solution allows the additional data-path logic to be implemented in the field using eFPGA co-extended.
“The combination of Codasip Studio and Menta’s eFPGA technology opens new possibilities of re-configuration and customisation after the tape-out of the processor”, said Codasip Chief Technology Officer Zdeněk Přikryl. “Such architectures benefit from the power of automatically generated C compilers that leverage the newly-added logic for custom instructions. This enables users to stay on the leading edge of performance for a long time after the processor is in silicon.”
