The LegUp HLS tool, which was commercialised from research carried out at Toronto University, will make it easier for a larger community of software engineers to harness the algorithm-accelerating power of Microchip’s PolarFire FPGA and PolarFire System on Chip (SoC) platforms.
“The LegUp team brings us deep experience in high-level synthesis and related technologies as we continue to optimise the integrated design environment tool flows for our PolarFire FPGA and PolarFire SoC customers,” said Bruce Weyer, vice president of the FPGA business unit at Microchip. “The acquisition also gives our traditional Microchip MCU and MPU clients the ability to use FPGAs as accelerators through an easy-to-use compiler that will substantially improve their design productivity and system performance while shortening their time to market.”
The LegUp HLS tool will be used alongside Microchip’s VectorBox Accelerator Software Design kit and VectorBlox Neural Networking IP generator to provide a complete front-end solution stack for C/C++ algorithm developers who want to work with PolarFire FPGA and PolarFire SoC devices without having to understand the underlying Register Transfer Level (RTL) development flows.
"Software engineers needing hardware acceleration demand performance and power efficiency, while looking for tools that enable higher levels of abstraction for the hardware that will implement their compute-intensive algorithms,” said Andrew Canis, CEO of LegUp Computing. “We are very pleased to be part of a team that will help fuel rapid innovation for edge compute applications as we enable developers to leverage innovative software algorithms developed in C/C++ to be ported to low-power, thermally elegant, and compute-efficient PolarFire FPGAs and SoCs."
Microchip will be making the LegUp HLS tool available to early access customers immediately and roll out a fully integrated design flow in the first half of 2021
