Microchip’s VectorBlox Accelerator Software Development Kit (SDK) is intended to help developers take advantage of the company's PolarFire FPGAs for creating low-power, flexible overlay-based neural network applications without learning an FPGA tool flow.
FPGAs are increasingly being used for edge AI applications, such as inferencing in power-constrained compute environments, because they can perform more giga operations per second (GOPS) with greater power efficiency than a central processing unit (CPU) or graphics processing unit (GPU). However, they do require specialised hardware design skills.
Microchip’s VectorBlox Accelerator SDK is designed to enable developers to code in C/C++ and program power-efficient neural networks without prior FPGA design experience.
Highly flexible, the tool kit can execute models in TensorFlow and the open neural network exchange (ONNX) format which offers the widest framework interoperability. ONNX supports many frameworks such as Caffe2, MXNet, PyTorch, and MATLAB.
Unlike alternative FPGA solutions, Microchip’s VectorBlox Accelerator SDK is supported on Linux and Windows operating systems, and it also includes a bit accurate simulator which provides the user the opportunity to validate the accuracy of the hardware while in the software environment. The neural network IP included with the kit also supports the ability to load different network models at run time.
“In order for software developers to benefit from the power efficiencies of FPGAs, we need to remove the impediment of them having to learn new FPGA architectures and proprietary tool flows, while giving them the flexibility to port multi-framework and multi-network solutions,” said Bruce Weyer, vice president of the Field Programmable Gate Array business unit at Microchip.
“Microchip’s VectorBlox Accelerator SDK and neural network IP core will give both software and hardware developers a way to implement an extremely flexible overlay convolutional neural network architecture on PolarFire FPGAs, from which they can then more easily construct and implement their AI-enabled edge systems that have best-in-class form factors, thermals and power characteristics.”
The PolarFire FPGA neural network IP is available in a range of sizes to match the performance, power, and package size trade-offs for the application, enabling customers to implement their solutions in package sizes as small as 11 × 11mm.
The launch is part of the company's Smart Embedded Vision initiative, which was launched last July to provide hardware and software developers with tools, intellectual property (IP) cores, and boards for meeting the thermally constrained and small-form-factor requirements of edge applications.
