Microchips boost smartphone performance, reduce power supply voltages

The technology has been developed by EU funded scientists as part of the 'Dual channel cmos CMOS for sub-22nm high performance logic' (Duallogic) project. Athanasios Dimoulas, coordinator of the project said: "We sought to give a performance boost to future devices operating at lower power supply voltages, so you would get more performance for less energy. This is required for the kind of multimedia applications that run on small handheld devices powered by limited batteries." The Duallogic researchers kept silicon as the substrate but looked beyond silicon to less common semiconductor materials to create the conduction channel inside the millions of transistors making up a microchip. "It is widely known that an integrated circuit – the 'brain' of all electronic systems – is made of silicon," said Dimoulas. "While the material is abundant in nature and easy to work with, it does not allow electrons to run through it as fast as we would like, particularly in low voltage applications. In the Duallogic project, we wanted to replace [the] silicon channels of transistors with higher mobility semiconductor materials like germanium and compound semiconductors to make the charge carriers – electrons and holes – move faster through the transistor." The team worked on large scale silicon wafers, using industrial scale techniques and the project was aided by organisations such as the University of Glasgow, imec, STMicroelectronics and IBM Zurich. Different channel materials were used for each of the two transistors found on microchips, the positive p-type and the negative n-type. Germanium (Ge) and SiliconGermanium (SiGe) were chosen for the p-type transistors and IndiumGalliumArsenide (InGaAs) – a compound semiconductor, for the n-type transistor. The materials were chosen because they offer high mobility for the charge carriers in each type of transistor. The InGaAs compound is known as a III-V semiconductor and is composed of elements from the third and the fifth columns of the periodic table. These compounds offer much higher mobility, a measure of how easily charge carriers can move about inside the semiconductor lattice. Greater mobility ultimately leads to higher performance. Likewise, Germanium offers higher mobility for p-type transistors. "This approach is considered to be high on the priority list for many RTD and technology integrator labs around the world," said Dimoulas. It has proved a very successful research path for the Duallogic consortium, too. "We successfully integrated SiliconGermanium p-type transistors and achieved state of the art results, even beyond expectations." Results for the n-type transistor were mixed but positive - the team successfully created an InGaAs transistor and also found a way to arrange them on a silicon substrate so as to keep the fabrication cost low. This was a major result, because there are significant integration and architecture issues when building a III-V-based transistor on a silicon substrate. According to Dimoulas, integration for the p-type transistor was much easier: "Because Germanium and Silicon are both in group IV of the periodic table, their structure is similar and they are chemically compatible so Germanium can be processed in much the same way as Silicon." However, InGaAs is less compatible with silicon and has a greater lattice mismatch which leads to fabrication problems. Cointegration of both types of transistors was even more challenging, but the team developed a new fabrication tool to cope with the issue of growing III-V layers onto a large silicon substrate. Dimoulas believes further research is needed on the n-type transistor developed in the project. In addition, Duallogic achieved significant results for a specific kind of transistor architecture called implant free quantum well transistors, which could lead to microchips that offer even better performance than conventional Metal oxide semiconductor transistors. Research is continuing and there are plans for a larger project with more partners, because the results are not yet at the level where they can be picked up by industry. "We also want to develop simple circuits, like ring oscillators or inverters, so we are currently looking at appropriate RTD instruments to continue the work," Dr Dimoulas said. "With the help of academics and process developers, the project explored advanced and risky technology options. The collaboration of 'Integrated device manufacturers' with equipment vendors in the same project is an excellent opportunity for the nanoelectronics industry to make early decisions about the equipment investments required for future volume manufacturing."