Communications systems are a major user of FPGAs due to their flexibility and reconfigurability for customisation and real-time updating of protocols and algorithms. Flex Logix’s EFLX eFPGA has been designed to allow systems to be smaller and lower power by integrating the FPGA into the application-specific integrated circuit/system-on-a-chip (ASIC/SoC) compared to the traditional method of using an external FPGA.
Commenting Geoff Tate, CEO of Flex Logix, said, “Because our eFPGA can deliver significant improvements in performance, power and reconfigurability, we are seeing more opportunities to work with a premier custom silicon solution provider such as OpenFive. Customers can benefit greatly from having RTL configurability in their ASICs.”
Shafy Eltoukhy, CEO of OpenFive added, “Flex Logix’s eFPGA offerings are also easy to integrate across most process nodes, enabling OpenFive to deliver domain-specific custom silicon solutions with differentiated IP that are optimised for power, performance and area.”
The EFLX4K Logic IP core has 4K 4-input-equivalent-LUTs, 632 inputs and 632 outputs and is a complete eFPGA. The EFLX4K DSP IP core replaces about one-fourth of the LUTs with 40 multiplier-accumulators for DSP and artificial intelligence (AI) applications. The two EFLX4K cores can be tiled together to make larger arrays to support applications needing more LUTs as required, up to 7x7 with any mix of logic and DSP cores.
The EFLX arrays are programmed using VHDL or Verilog. The EFLX Compiler takes the output of a synthesis tool such as Synopsys Synplify and does packing, placement, routing, timing and bitstream generation. The bitstream, when loaded into the array, programs it to execute the desired RTL.
