PICMG unveils CompactPCI PlusIO version 2.30
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PICMG has released version 2.30 of the CompactPCI PlusIO specification. The enhancement adds serial PCI Express, Ethernet, SATA, SAS and USB extensions to the CompactPCI family of specifications while preserving PCI bus connectivity.
The specification defines the use of previously reserved rear I/O pins for the 32bit CompactPCI system slot with new high speed serial signals. To preserve interoperability with existing CompactPCI standards, a fully compliant high speed connector is used for position J2 on the module, combined with the existing backplane connectors. As such, it defines the system slot extension. Peripheral boards for CompactPCI Serial, CompactPCI Express or PICMG 2.16 can also be combined, depending on the interface.
"This is an important technical addition to CompactPCI", said Doug Sandy, PICM's vice president of technology, "as it allows the use of advanced serialised buses found within all modern computer architectures for the embedded markets where CompactPCI is widely used. This avoids 'fork lift upgrades', while providing a clear path to today's higher performance silicon."
CompactPCI was initially ratified as PICMG 2.0 in 1995. As a passive backplane system based on PCI signalling, it defined computing and peripheral nodes using 3U and 6U Eurocard form factors.
The release also means the names of the different specifications are also finalised. CompactPCI PlusIO is now the bridge to the new full serial architecture called CompactPCI Serial. The previous umbrella name CompactPCI Plus will not be used anymore.
