The UltraSoC IP will enable Picocom and its customers to monitor, analyse and fine-tune the performance of their systems throughout the whole product lifecycle, starting in the lab for silicon bring-up and software development, through to deployment and in-field optimisation.
Commenting Picocom President Peter Claydon said, “As a result of this partnership with UltraSoC, Picocom customers can accelerate and de-risk their own system development and optimise system performance in the field over the lifetime of their product. This is particularly important as the mobile industry starts to adopt open RAN and virtual RAN principles, which will see software from different vendors running code on the same hardware, with frequent software upgrades over the product lifecycle.”
Picocom provides open RAN standards-compliant baseband SoCs and carrier-grade software products for 5G small cell infrastructure. Its latest distributed unit (DU) baseband offload system-on-chip (SoC) is designed to be deployed in buildings to increase 5G coverage and reduce the processing load on 5G macrocells.
Picocom has selected a suite of UltraSoC’s IP to enable monitoring and development of software for its SoC as a whole, from IP definition through to software/code refinement. This addresses the SoC’s CEVA XC12 DSPs, control processors, Arteris FlexNoC (Network on Chip) interconnect, custom accelerators, DDR controller, Ethernet interface, and other logic, in a single monitoring and analytics infrastructure. This makes it much easier for Picocom’s engineers and its customers to fine-tune performance. Picocom will also deploy UltraSoC’s USB IP, allowing customers to debug systems at high-speed in a ‘closed chassis’ through a standard USB port.
Using UltraSoC’s hardware monitoring and analytics infrastructure will allow Picocom to offer a variety of optimisation features across its product line. Data on the behaviour of the system is captured in real-time, and with detailed information about system timing – essential for demanding applications such as wireless communications. Just as importantly, UltraSoC’s on-chip monitors feature integrated ‘smarts’: data can be pre-processed and analysed locally on-chip, giving the engineer deep insight into system operation, without the need to route excessive volumes of data off-chip.
UltraSoC CEO Rupert Baines said: “Too many silicon companies regard post-silicon debug and optimisation as ‘someone else’s problem’. The fact that Picocom has selected such a comprehensive suite of UltraSoC IP demonstrates a serious commitment to helping its customers deliver the best possible products, on time – and with reliability and upgradeability ‘baked in’ from day one.”
