The European funded REALITY project has concluded its work after 30months. The project focused on developing what it termed 'industrially relevant innovative design techniques, methods and flows for the design and analysis of energy efficient self adaptive SoCs'.
In particular, the project addressed the task of benchmarking the impact of the 32nm cmos process manufacturing variability at all abstraction levels, while developing approaches to compensate their negative impact in the design of final products.
Amongst the findings of the six company project were that metal granularities in 32nm high K metal gate cmos transistors can double the variability if their size becomes similar to that of the transistors.
Following a full statistical characterization of an ARM926 core, a correlation was found between the timing, leakage and dynamic power and local and non local variations.
Meanwhile, using the ARM core as driver, REALITY found that sram components are responsible for more than the half of the variations on critical path timing. Hence, statistical timing analysis flows that assume predictable timing response from these components may lead to over optimistic conclusions.
Finally, REALITY also found that process variability is not only a concern for hardware designers, but also for software engineers. Variability affecting multicore multimedia platforms makes it hard to guarantee a certain QoS from the running application's functionality.
Amongst the circuit design techniques investigated for system adaptation was Adaptive Body Biasing (ABB). REALITY says it has shown that ABB can speed an SoC's performance when, due to technology parameter variations, the manufactured product ran too slowly. ABB allows the transistor's threshold voltage to be varied in accordance with the supply voltage and the operating frequency needed for a given task.
