These latest certifications allow customers to develop highly differentiated end-products using best-in-class EDA software, silicon process and advanced packaging technologies.
According to Mike Ellow, executive vice president, Electronic Design Automation, Siemens Digital Industries Software, the company’s collaboration with TSMC has succeeded in delivering EDA technologies that provide customers with an expanding number of design avenues, even as time, cost and design complexity pressures continue to rise.
“The combination of IC design solutions and TSMC’s leading-edge process and advanced packaging technologies enable our many mutual customers to achieve truly remarkable and industry-disrupting innovations,” said Ellow.
Siemens’ Calibre nmPlatform tool, for IC verification, is now certified for TSMC’s N2 process. Among the Siemens toolsets included in this platform and now N2 certified are Siemens’ Calibre nmDRC software, Calibre nmLVS software, Calibre Pattern Matching software and Calibre PERC software toolsets – all of which are in now place for the earliest adopters of TSMC’s innovative technology.
Siemens’ Analog FastSPICE platform for circuit verification of nanometre analogue, RF, mixed-signal, memory, and custom digital circuits recently achieved TSMC certification for the foundry’s advanced N3P, N2 and N2P processes.
In addition, as part of the custom design reference flow (CDRF) for TSMC’s N2 processes, the Analog FastSPICE platform now supports TSMC’s Reliability Aware Simulation technology, which addresses IC aging and real-time self-heating effects among other advanced reliability features. The CDRF for TSMC’s N2 technology also includes Siemens’ Solido Design Environment software for advanced variation-aware verification at high sigma.
From a 3D-IC perspective, Siemens and TSMC have successfully collaborated to certify Siemens’ Calibre 3DSTACK solution’s support for the foundry’s latest 3Dblox standard. This certification continues the partners’ ongoing collaboration on thermal analysis requirements for TSMC‘s 3DFabric advanced packaging technologies.
The companies have also worked together to unlock the full potential of Siemens’ Tessent software for 3D-IC design-for-test (DFT) implementations for the benefit of TSMC ecosystem customers and partners at advanced nodes.
TSMC and Siemens are developing new 3D-DFT methodologies, including Known Good Die (KGD) loopback testing and physical aware die-to-die fault testing and diagnosis, by leveraging the 3Dblox standard to address the special IC test and diagnosis challenges that arise at 2nm geometries and below.
“Siemens has been a long-time, strategic partner and continues to increase its value to the TSMC Open Innovation Platform (OIP) ecosystem by offering more high quality solutions in support of our newest leading-edge technologies,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “We look forward to seeing even more innovations as we continue to further grow, what is, a strong and highly valued partnership.”
