SiFive unveils high-performance RISC-V datacentre processor

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SiFive has announced the Performance P870-D datacentre processor that’s capable of supporting highly parallelizable infrastructure workloads including video streaming, storage, and web appliances.

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According to SiFive, when used in combination with products from its Intelligence product family, datacentre architects can build an extremely high-performance, energy efficient compute subsystem for AI-powered applications using the P870-D.

Building on the success of the P870, the P870-D supports the open AMBA CHI protocol, so customers have more flexibility to scale the number of clusters. This scalability allows customers to boost performance while minimising power consumption.

By harnessing a standard CHI bus, the P870-D helps customers to scale up to 256 cores while harnessing industry-standard protocols, including Compute Express Link (CXL) and CHI chip to chip (C2C), to enable coherent high core count heterogeneous SoCs and chiplet configurations.

The P870-D processor enables the creation of infrastructure SoCs with higher compute density, offering improved performance per watt metrics for workloads that require the execution of multiple compute tasks in parallel. As a result, SiFive’s P870-D offers advantages in total cost of ownership, which is especially important as the industry is looking for ways to lower the cost of training AI models.

Additionally, the power-efficiency of the P870-D aligns with the industry’s growing focus on sustainability.

“SiFive brings a clean, modern approach to the AI era with our broad portfolio of RISC-V solutions. The new P870-D enhances our proven Performance architecture to bring new levels of performance, flexibility, and scalability,” said John Ronco, SiFive SVP of Product. “The full solution offering from SiFive - including software, IOMMU, interrupt controller, and other uncore blocks - combined with our intelligence processors for dedicated AI compute makes it easy for our customers to achieve the most effective performance/watt/dollar metrics on AI and datacentre workloads.”

“Energy efficiency is going to be a major factor for data centre architects for the foreseeable future. This is a clear differentiator for RISC-V and why we expect the architecture to play a major role in the continued growth of high-performance data centre processing,” said Edward Wilford, Senior Research Director, Omdia. “We forecast that more power-efficient data center processors will make up over 40% of the market by volume in 2030, driven by the growth of open-source software and open-standard architecture.”

SiFive is working with a number of ecosystem partners to help further streamline the development of complete systems.

SiFive has also added Reliability Availability Serviceability (RAS) features to the P870-D. These features are designed to detect errors before an issue arises and protect data integrity, helping to prevent downtime and ensure the overall reliability of the system. Additionally, the P870-D includes a distributed and scalable IOMMU for accelerating virtualized device IO, which is also critical to address the latest functional safety and security requirements.

From a software perspective, customers that create datacentre platforms harness a combination of open-source software and first party software.

Many of the foundational open-source software elements already exist for RISC-V and this momentum is accelerating due to the collaborative efforts across the community such as the RISE Project. The P870-D processor is aligned with the platform and profile standards defined by RISC-V international which enables customers to utilise this software for their designs, saving time, cost, and increasing the chances of program success.

To further accelerate the development process, customers can leverage SiFive’s standard run-control debug capabilities, along with supported debugging solutions from leading tool vendors.