“We adapted the process flow of our previously published 14/16nm-node strained germanium p-finFETs to study the benefit of strained germanium GAA p-FETs at short gate lengths and sub-10nm diameter,” explained Nadine Collaert, distinguished member of technical staff at imec.
High mobility materials such as germanium and III-V have been considered as potential solutions for deeply scaled devices, due to their higher intrinsic carrier mobility. However, these materials have a larger permittivity and a smaller bandgap than silicon, making it more difficult to apply the necessary electrostatic control at scaled gate lengths.
The team claims to have processed GAA p-FETs with the shortest gate lengths at 40nm and smallest nanowire diameter at 9nm reported to date. At these short gate lengths, the devices maintain electrostatic control with a drain-induced barrier lowering of 30mV/V and a sub-threshold slope of 79mV/dec.
imec has also reported on the use of HPA as a performance booster for both germanium FinFETs and GAA devices. In their test, the researchers measured an improved interface quality and hole mobility of approximately 600cm2/Vs as a result of a HPA at 450°C. The optimised HPA is said to improve the electrostatics and overall performance of GAA devices.
