This offering enables scalable IC operation of up to 24V making it suitable for growing demand from the consumer, industrial, automotive, and computing markets.
This complements the company’s previously announced low-voltage, 65nm Power BCD process, as well as its high-voltage 140V Resurf bulk and 200V SOI technologies, providing customers with best-in-class performance across the entire range of 1.2V to 200V from a single foundry with the same design tools and design experience.
The technology builds on six generations of successful existing high-performance 0.18um power management platforms and is largely backward compatible making it easy to port existing parts and designs to the more efficient novel process.
“We are very excited to announce the release of design kits for this novel technology that provides our customers with breakthrough performance not available elsewhere,” said Shimon Greenberg, Vice President and General Manager of Power Management Business Unit, Tower Semiconductor. “We are committed to continue our investment in developing and providing best in class Power Management technology enabling our customers to bring to market advanced products and gain share in this large and growing segment of the semiconductor market”.
Specifically, this process offers a profoundly lower Rdson with record-breaking 6mΩmm², 24V operation, smaller footprint, scalable power transistors, and low production mask count, enabling significant performance and cost advantages.
In addition, its robust design with high breakdown voltage at all operating conditions provides enhanced IC reliability making it suitable for high-power monolithic ICs in applications such as: DC/DC converters, load switches, PMIC and motor drivers used in laptop processors and fans, drones and robotic motor drivers used in the consumer, computing, automotive and industrial markets.
