Engineering publications brought to you by Mark Allen

EDA & Design Software

HES FPGA accelerator board targets HPC, HFT and prototyping applications

Aldec enhances traceability between system and hardware lifecycle data

SEGGER offers support for SiFive Insight debug/trace platform

Achronix using Synopsys' DesignWare IP solutions to accelerate FPGA development

CEVA's DSP and Voice Neural Networks integrated with TensorFlow Lite

Synopsys delivers industry's first Ethernet 800G verification IP

Cadence digital full flow optimisd to deliver improved results

Cadence Tensilica HiFi IP accelerates AI deployment

First verification IP for PHY covering multiple protocols

Cadence makes Integrand acquisition

UltraSoC collaborates with PDF Solutions to prevent in-life product failures

Analogue design will be needed until you or I turn into robots