Altera uses fine pitch copper bumps in 20nm Arria 10 devices
1 min read
Altera says it is the first company to adopt TSMC's fine pitch copper bump based packaging technology in production of 20nm Arria 10 FPGAs and SoCs.
"TSMC has provided a very advanced and robust integrated package solution for our Arria 10 devices," said Bill Mazotti, pictured, vice president of worldwide operations and engineering at Altera. "Leveraging this technology is a great complement to Arria 10 FPGAs and SoCs and helps us address the packaging challenges at the 20nm node."
The packaging technology is claimed to bring better quality and reliability than standard copper bumping solutions. It is also said to enable the high bump counts required by high performance FPGAs and to provide high bump joint fatigue life, improved electromigration performance and low stress on the Extra Low-K layers.
TSMC's copper bump based package technology is said to be suited for use in products which combine large die size and small bump pitch. The technology has demonstrated production level assembly yields of better than 99.8%.
