Using the AI-driven Cadence Cerebrus Intelligent Chip Explorer, many business units have achieved significant performance, power and area (PPA) benefits and, given the complexity and size of Broadcom’s product designs at advanced nodes, AI-driven technology is being seen as a game changer in achieving increasingly aggressive time to tapeout schedules.
Due to the advanced capabilities of Cadence Cerebrus, Broadcom has been able to automate tasks through AI, for improving final design data and turnaround time. For example, the floorplan exploration capability helps automatically determine the optimal chip design floorplan, saving PPA.
The AI model reuse capability also enables Broadcom to apply previous design learnings to their next-generation designs, reducing the time to optimised results. Finally, the easy-to-use interface provides interactive analytics, offering valuable insights into design data and easy debug.
“We use a wide portfolio of Cadence solutions across our business units, and we have seen outstanding PPA improvements from the use of the AI capabilities of Cadence Cerebrus,” said Yuan Xing Lee, Vice President and Head of Central Engineering, Broadcom. “Over the last year, we have seen accelerated adoption of Cadence Cerebrus AI technology across multiple business units within Broadcom and we look forward to taking advantage of this technology in our next generation of products.”
“With the AI-driven capabilities of Cadence Cerebrus, Broadcom successfully reduced manual tasks so they could focus on higher-impact, strategic work while meeting PPA goals,” added Dr. Chin-Chi Teng, Senior Vice President and General Manager, Digital & Signoff Group, Cadence. “Today’s designs are very complex, and through our continued collaboration, we are working together to ensure that Broadcom is able to utilise our AI capabilities to deliver compelling designs to market faster.”
