Cortus unveils ‘world’s smallest’ 32bit mcu IP core

The APS1 is targeted at simple embedded applications with limited code and data memory requirements. According to its developers, it offers a cost effective way to replace many existing 8bit cores by offering superior power consumption and simpler software development. The APS1 is a native 32bit core with a modern risc architecture and 16 general purpose registers. In common with other Cortus processors, it has a five to seven stage integer pipeline with out of order completion, ensuring that most integer instructions (load and stores included) are executed in a single cycle. "We are proud to break our own record in terms of 32bit core size", said Michael Chapman, Cortus' president and ceo. "Our first product – the APS3 – pioneered the market for silicon efficient 32bit processor cores and with the APS1 we have an even more compact core. With the APS1 released, there is almost no reason to continue to use 8bit cores. SoC developers benefit from an easier software development cycle, more performance and lower power consumption." Suitable for Internet of Things applications such as managing sensors or handling simpler wireless protocols, the APS1 fully supports developing with C or C++ and does not require any coding in assembler. It is also suitable for managing I/O and for implementing programmable state machines. "With more processing performed per cycle, fewer cycles are needed compared to an 8bit core and the processor spends more time asleep," Chapman added. "With a larger register set fewer memory accesses are required; further conserving energy. For more complex processor applications requiring more than 64KB data and 64KB code memory, the APS3R provides an excellent upgrade path."