DPU increases preverified dsp options
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Tensilica has introduced a high performance dataplane processor (DPU) core optimised for dsp and the SoC dataplane, which it says offers the industry's widest range of preverified dsp options.
According to Tensilica, the Xtensa LX3 DPU options range from a single floating point accelerator to a 16-MAC vector dsp powerhouse. It has been designed to reach speeds of over 1GHz in 45nm process technology with an area of 0.44mm2 and power of 0.015mW/MHz.
When built with the new ConnX Baseband Engine dsp, the processor is said to deliver over 10 Giga-MACs per second performance, running at 625MHz with a footprint of 0.93mm2 and consuming 170mW, including leakage.
Jack Guedj (pictured), Tensilica's president and ceo, said: "The Xtensa LX3 processor, Tensilica's flagship product, provides significant speed and power improvements to enable efficient digital signal processing and control processing in SoC or mixed signal devices.We've invested heavily in our DPU technology to make it smaller, easier to use, and up to 20% faster, providing designers with the performance levels and connectivity expected from custom RTL blocks along with the programmability and debug benefits of conventional processors. And since Xtensa LX3 cores are pre-verified modules, it significantly reduces design risks for dataplane design compared to traditional custom hardware RTL design approaches."
