DSP IP targeted at smartphone and consumer electronics applications
1 min read
Silicon IP licensor CEVA has expanded its TeakLite-III dsp architecture with the launch of the CEVA-TL3211, an advanced dsp core targeting low cost smartphone and high definition (HD) audio applications.
The CEVA-TL3211 is said to deliver high levels of performance, power efficiency and user flexibility, along with requiring the 'smallest memory footprint', According to CEVAm the core has already been adopted by a Tier-1 semiconductor vendor.
Compliant and code compatible with the TeakLite-III architecture, the 32bit audio dsp runs at 1GHz and has a silicon footprint of only 0.2mm2 on a 40nm process. Aimed in particular at the digital tv and set top box markets, the processor runs a complete dtv use-case in less than 200MHz, leaving headroom for post-processing functions. For low cost smartphones, the CEVA-TL3211 allows the integration of baseband processing with application processing related needs like HD audio and voice enhancements such as noise cancellation and beam forming.
The CEVA-TL3211 features native 32bit processing, including a single cycle 32x32bit multiplier, a 32bit register file, 64bit wide memory bandwidth, 72bit accumulation for wide dynamic range, and efficient bit manipulation capabilities. In addition to supporting up to three instructions running in parallel, the core also supports single and double precision FFT instructions.
