Designed to enhance and streamline the verification process for high-speed interface IP subsystems, the platform supports Faraday’s and third-party controller IP solutions, enabling comprehensive hardware and software verification through FPGA integrated with HiSpeedKit-HS.
The HiSpeedKit-HS platform allows interface IP verification thorough integration and testing within a realistic SoC environment. It features holistic components, including ARM Cortex A53 and the high-speed interface IP test chips of Faraday’s DDR 4 PHY, PCIe Gen 4 PHY, and Gigabyte Ethernet PHY.
In addition to verification in SoCs, the collocated controller is further integrated to ensure the integrity and quality of the high-speed interface subsystem, reduce future integration risks, accelerate time-to-market, and provide early-stage performance simulation across diverse software system applications.
“Our experienced IP service team provides a one-stop IP solution with an efficient IP management system; the subsystem service to facilitate early-stage validation reducing risk and turnaround time; and comprehensive post-silicon debugging support,” said Flash Lin, COO of Faraday Technology. “The HiSpeedKit-HS platform can accelerate design-in process for interface IPs and SoC implementation, representing a major advancement in our commitment to delivering high-quality, reliable IP solutions,” he added.
