Mentor Graphics partners with EnSilica for its fpga IP platform

As a result, its range of eSi-RISC embedded processor cores and eSi-Comms library of communications IP have been fully validated for use in Mentor Graphics' Precision Synthesis fpga design flow. Daniel Platzker, product line director for fpga synthesis at Mentor Graphics, said: "EnSilica provides a substantial catalogue of configurable embedded processor cores and communications IP. By validating its IP for use with Precision, EnSilica broadens the Precise-IP catalogue of advanced partner cores, allowing our mutual customers to benefit from Mentor Graphics' comprehensive, vendor-independent fpga design flow." EnSilica's eSi-RISC is a range of low power soft processor cores for embedded systems and according to the company, is the only processor architecture scalable from 16 to 32bits. It encompasses optional dsp extensions, floating point and custom instructions. The memory architecture can be configured for Harvard or Von Neumann, or to include data and program caches. Using a mix of 16 and 32bit instructions, EnSilica says it reduces the program code size by up to 40% compared to fpga vendor processors such as NIOSII and MicroBlaze. The minimum configuration can be implemented in 8K gates, while system clock speeds of over 200MHz are said to be achieved in Altera Stratix IV and Xilinx Virtex-6 fpgas and all processors use the industry standard AMBA APB and AXI buses. EnSilica also has a library of APB-based peripherals, including UART, SPI, I2C, Timers and a 10/100 Ethernet MAC. "Our eSi-RISC embedded processor cores and eSi-Comms IP library will give Mentor Graphics' Precision Synthesis users an additional, distinctive edge to their fpga designs," said Ian Lankshear, managing director of EnSilica. "Silicon-proven, eSi-RISC's single architecture is scalable over a range of embedded applications enabling companies to secure their software investment while addressing a wide range of needs. A high level of configurability enables hardware resources to be optimised to application requirements, minimising area and power to a level not possible with a general purpose processor architecture. The highly pipelined nature of the design gives customers a solution that can be easily migrated between fpga types or even to ASIC technologies." All the eSi-RISC embedded processor cores and eSi-Comms communications IP are available direct from EnSilica.