This solution will enable chip makers to address the demanding bandwidth and latency requirements of transferring massive amounts of data for compute-intensive AI workloads while supporting broad ecosystem interoperability.
Large language models' demand for computational capabilities is growing rapidly, with trillions of parameters needing to be processed in data centres. Synopsys is now offering the industry's only PCIe standards-based solution for secure data transfers up to 512 GB/s bidirectional in a x16 configuration to mitigate AI workload data bottlenecks.
"Synopsys continues to give designers access to the latest interfaces in the most advanced nodes, helping them to address the demands of compute-intensive designs," said John Koeter, senior vice president of marketing and strategy for IP, Synopsys. "Synopsys' IP for PCI Express 7.0 will provide customers with a complete, standards-based solution enabling an early start on next generation of HPC and AI designs and accelerating the path to silicon success."
Synopsys' IP solution for PCIe 7.0, including controller, IDE security module, PHY and verification IP, reduces integration risk for AI and HPC networking chips.
The IP solution, compliant to evolving standards, improves interconnect power efficiency by up to 50% and enables twice the interconnect bandwidth for the same chip perimeter compared to prior PCIe generations.
The PCIe 7.0 Controller IP enables low latency, high-bandwidth links with a full endpoint to root-complex solution that supports all required features for backward compatibility. It also provides improved signal integrity with speeds up to 128 Gb/s per lane and integrates with Synopsys CXL Controller IP solutions.
Synopsys Integrity and Data Encryption (IDE) Security IP for PCIe 7.0 provides confidentiality, integrity, and replay protection against hardware-level attacks. Synopsys PCIe 7.0 Verification IP and hardware-assisted verification solutions offer built-in protocol checks and multiple configurations of controller and PHY to accelerate verification and validation closure.
The new Synopsys PCIe 7.0 IP solution is being backed by a number of leading companies to meet the market demand for advanced interconnects.
"Accelerating every interconnect within the data centre, including PCI Express, is critical to address the performance demands of AI clusters at scale," said Debendra Das Sharma, Senior Fellow and Chief I/O Architect at Intel Corporation. "The combination of Synopsys IP for PCIe 7.0 and Intel's future generation products will offer system architects both the bandwidth needed for the most demanding data centre workloads and seamless ecosystem integration."
