Thinnest FinFET yet
At the recent VLSI Symposium, IMEC announced that it has improved its 193nm immersion lithography process to yield reproducible FinFETs with fin widths down to 5nm and high aspect ratios. The development is said to eliminate the need for channel doping, reducing parametric spread and junction leakage.
A ring oscillator, featuring metal gates and undoped fins, developed by IMEC has shown inverter delay of 13.9ps at 1V and a 1.9nA off current – said to be the best low power FinFET performance yet reported.
