Andes Technology and proteanTecs partner to bring reliable monitoring to RISC-V cores

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Andes Technology, a supplier of RISC-V processor IP, and proteanTecs, a developer of performance monitoring solutions for advanced electronics, have unveiled a strategic partnership agreement.

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This collaboration will enable joint customers to integrate proteanTecs' on-chip monitoring IP into Andes’ RISC-V processor cores, customers can then leverage proteanTecs’ real-time analytics software applications to optimise performance, reduce power consumption, detect faults, and enhance overall system reliability, during production and lifetime operation.

proteanTecs’ monitoring IP has been successfully integrated on the AndesCore AX45MPV, a popular 64-bit RISC-V multicore vector processor. Equipped with powerful RISC-V vector processing and parallel execution capability, this core has been adopted by over a dozen applications with large data sets, such as AI inference and training, signal processing, and scientific computing since released in 2022.

By pre-validating this IP integration, customers will be able to design in this licensed core, shorten their development time and accelerate their time-to-market.

"proteanTecs offers the industry's most comprehensive and robust on-chip monitoring solutions,” said Dr. Charlie Su, CTO and President at Andes Technology. “As chip complexity increases, monitoring is paramount, especially in AI applications. proteanTecs' deep data insights will empower our mutual customers to optimise their designs, improve their power/performance envelope, proactively prevent faults, and deliver superior products faster.”

This partnership underscores the continued commitment of Andes Technology and proteanTecs in advancing the RISC-V open standard. Reports estimate that by 2030 there will be over 16 billion RISC-V-based SoC units shipped annually.

Both Andes Technology and proteanTecs are active members of RISC-V International, the global non-profit organisation devoted to furthering the RISC-V Instruction Set Architecture (ISA).

“With the rapid growth of high-performance applications, high compute density and advanced packaging technologies - especially in evolving AI models and workloads - on-chip monitoring is no longer a luxury, but a necessity,” said Uzi Baruch, Chief Strategy Officer (CSO) at proteanTecs. “Partnering with Andes Technology brings the value of proteanTecs’ solutions to a wider range of SoC devices. These benefits extend beyond production into the field, with real-time monitoring applications that enable proactive fault prevention and the unique ability to reduce power and increase performance in mission-mode.”