DARPA moves closer to cost effective fabrication of custom ASICs
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The Defense Advanced Research Projects Agency (DARPA) says it has made steps toward the cost effective fabrication of custom ASICs.
According to DARPA, its Maskless Nanowriter program is developing a massively parallel, direct write electron beam (eBeam) lithography tool with a write speed more than 100times faster than current single column eBeam tools.
If successful, DARPA claims this program could eliminate the need for expensive mask sets and increase economic viability of small lot production for custom ASICs and micro electromechanical systems. The new Nanowriter tool is targeted at the 45nm lithography node with technology scalable to 32nm and beyond.
This DARPA program recently demonstrated a micro-lens array to pattern a beam into 1million electron beamlets and showed a second generation eBeam column designed to significantly reduce pattern blur. Lithography is currently performed by inserting a complex mask between a deep ultraviolet light source and a silicon wafer, projecting a circuit pattern onto that wafer. High throughput in direct write lithography is difficult to achieve since each feature is written serially as opposed to conventional lithography where millions of features are written in parallel. In this new high throughput maskless tool, high throughput is achieved through the simultaneous deployment of 1million parallel electron beamlets.
"As feature sizes on integrated circuits have decreased to below 65nanometers, the cost of these mask sets has become an overriding factor for small lot fabrication of only a few wafers," said Joseph Mangano, DARPA program manager. "By eliminating expensive mask sets, the Nanowriter tool will provide the cost benefits of large scale IC manufacturing in quantities of one wafer."