The agreement will see the two companies jointly develop a portfolio of key customised IP, optimised design flows and techniques for Intel 18A technology featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery.
Joint customers will be able to accelerate their SoC project schedules on process nodes from Intel 18A and beyond while optimising for performance, power, area, bandwidth and latency for demanding AI, HPC and premium mobile applications.
“We furthered our partnership with Intel Foundry Services through a significant strategic multiyear agreement to provide design software and leading IP at multiple Intel advanced nodes, thereby advancing Intel’s IDM 2.0 strategy and accelerating mutual customer success,” said Anirudh Devgan, president and chief executive officer at Cadence.
Commenting on the agreement Stuart Pann, Intel senior vice president and general manager of IFS, said, “We will leverage Cadence’s world-class portfolio of leading IP and advanced design solutions to enable our customers to deliver high-volume, high-performance and power-efficient SoCs on Intel’s leading-edge process technologies.”
Fast-growing market segments, such as AI/ML, HPC and premium mobile computing, require the latest standards in IP to take advantage of advanced packaging and silicon process technologies.
Cadence’s leading-edge implementations of standards, such as advanced memory protocols, PCI Express, UCI Express and others for these key segments, will mean that customers will be able to achieve scalable, high-performance designs, accelerating time to market in IFS’ most advanced silicon technologies and 3D-IC packaging capabilities.
