MIPS unveils three cores in new microprocessor range

"With the launch of the Aptiv Generation of products, MIPS is entering a new era of innovation and increasing our competitive position," said Gideon Intrater, MIPS' vp of marketing. All three families are based on the MIPS32 Release 3 architecture and are intended to build on MIPS' leading position in home entertainment. The company adds the products should strengthen its position in networking and prove attractive to those designing high volume embedded systems. "The Aptiv Generation is the result of strategic investments we have made, and are continuing to make for the future," Intrater continued. "With these cores, and the ever expanding ecosystem around the MIPS architecture, we are providing solutions that will enable our customers to differentiate and win in an increasingly competitive market." The proAptive family can deliver more than 4.4 CoreMark/MHz and 3.5DMIPS/MHz from a smaller silicon area than competing IP cores, says MIPS. These cores will be aimed at connected consumer electronics and control plane processing in networking applications The interAptive family blends a nine stage pipeline with multithreading to deliver a CoreMark/MHz figure more than 50% greater than from competing cores with a similar die area. Applications are expected to include baseband processing in LTE user equipment and small cells, solid state drive controllers and automotive equipment. Finally, microAptiv is a five pipeline core building on the MIPS32 M14K core. Said to offer 3.09CoreMark/MHz and 1.57DMIPS/MHz in microMIPS mode, the core is available in mcu and mpu versions.