Verification uses SVA approach
1 min read
OneSpin Solutions has announced what it believes to be the industry’s first verification solution that features gap free RTL verification using SystemVerilog Assertions (SVA).
Peter Feist, pictured, OneSpin’s president and ceo, said: “Our customers requested a verification process that features automatic gap detection for standard SVAs. The combination of our TIDAL library and the SVA enabled 360 MV and GapFreeVerification process, satisfies this need. It sets unprecedented benchmarks for productivity, applicability and capacity in SVA based formal verification and ensures the highest possible verification quality.”
OneSpin’s solution a new approach called the SVA Timing Diagram Assertion Library, or TIDAL, which allows users to capture timing diagrams as SVA properties. Using OneSpin’s 360 Module Verifier (360 MV), designers now can employ SVA to implement the GapFreeVerification process. GapFreeVerification, a closed loop verification process using SVA, guides users through the verification planning, execution, debug and formal coverage analysis stages. Automatic gap detection, meanwhile, identifies unverified RTL functionality, as well as gaps and errors in the specification.
